IEEE Design Automation Standards Committee
The Design Automation Standards Committee (DASC) is a subgroup of interested individuals members of the Institute of Electrical and Electronics Engineers (IEEE) Standards Association . It oversees IEEE Standards that are related to computer-aided design (known as design automation). It is part of the IEEE Computer Society.[1]
The biggest center of interest in the DASC has been around language based design and verification standards stemming from the key Hardware Description Language standards VHDL and Verilog. From these have flowed standards for timing, synthesis, math routines, test, power, encryption, and meta-data for the topics above.
The emphasis of the group has also grown to embrace standards being developed in analog-mixed signal and other extensions driven by these needs.
Standards sponsored by the DASC include:
- IEEE 1076 Standard VHDL Language Reference Manual (VASG)[1]
- VHDL-200x [2]: the next revision
- Issues Screening and Analysis Committee (ISAC) [3]
- VHDL Programming Language Interface Task Force (VHPI) [4]
- P1076.1 Standard VHDL Analog and Mixed-Signal Extensions (VHDL-AMS)
- P1076.1.1 Standard VHDL Analog and Mixed-Signal Extensions - Packages for Multiple Energy Domain Support (StdPkgs)
- P1076.4 Standard VITAL ASIC (Application Specific Integrated Circuit) Modeling Specification (VITAL)
- P1076.6 Standard for VHDL Register Transfer Level (RTL) Synthesis (SIWG)
- P1364.1 Standard for Verilog Register Transfer Level Synthesis (VLOG-Synth)
- P1481 Standard for Integrated Circuit (IC) Open Library Architecture (OLA) (IEEE1481R)
- P1499 Standard Interface for Hardware Description Models of Electronic Components (OMF)
- P1603 Standard for an Advanced Library Format (ALF) Describing Integrated Circuit (IC) Technology, Cells, and Blocks (ALF)
- P1647 Standard for the Functional Verification Language 'e' (eWG)
- P1666 Standard SystemC Language Reference Manual [cosponsored with IEEE-SA CAG]
- P1685 SPIRIT XML Standard for IP Description (IEEE-1685)
- P1735 (Study Group)
- SystemVerilog Working Group
- P1800 SystemVerilog: Unified Hardware Design, Specification and Verification Language (SV-IEEE1800) [cosponsored with IEEE-SA CAG]
- P1364 Standard for Verilog Hardware Description Language (IEEEVerilog)
- IEEE 1801 Standard for the Design and Verification of Low Power Integrated Circuits, the Unified Power Format
- IEEE 1850 Standard for PSL: Property Specification Language (cosponsored with IEEE-SA CAG)
Proposed standards have a "P" in front of them, which is replaced with a dash and year when the standard is issued.[1]
References
|
|
Current |
|
|
802 series |
- 802
- .1 (p, Q, Qat, Qay, X, ad, AE, ag, ah, ak, aq)
- .2
- .3
- .4
- .5
- .6
- .7
- .8
- .9
- .10
- .11 (a b d e f g h i j k n p r s u v w y ac)
- .12
- .15
- .15.4
- .15.4a
- .16
- .18
- .20
- .21
- .22
|
|
Proposed |
|
|
Superseded |
|
|
|
|